20-pJ/Pulse 250 Mbps Low-Complexity CMOS UWB Transmitter for 3–5 GHz Applications

This letter presents a CMOS on-off keying 3-5 GHz ultra-wideband (UWB) transmitter with low complexity, low power and high speed. In the transmitter, a new differential narrow triangular pulse generator using push and pull integrating technique was designed for reducing quiescent current and common-mode interference, and a new complementary switch mode on-off voltage controlled ring oscillator (VCRO) was proposed by breaking the oscillation loop instead of breaking the power to avoid base-band energy without extra shaping filter. Without using delay resistor and capacitor in the VCRO, the transient response speed of the transmitter can be increased by only utilizing the parasitic resistances and capacitances. The design was successfully implemented with a 0.18 μm CMOS technology. The test results show that the new UWB transmitter can obtain a sidelobe rejection of more than 20 dB, a low energy consumption of 20 pJ/pulse at 250 Mbps, and a small core chip size of 0.08 mm
²
.