A wide-range and high-precision real-time calibration for dynamic comparator

In this paper, a high-precision and high-linearity calibration is introduced for dynamic comparator offset using I-MOS capacitors. After calibration, the offset can be reduced from 29.9 mV to 66 μV (one sigma) at 2GHz working clock. Simulation results show that the SFDR and the SNDR can be improved 20dB in a case of 12bit 50MS/s successive approximation analog to digital converter (SAR ADC) with the proposed calibration method at the expense of 30 μW power consumption.