A novel reconfiguration strategy for 2D mesh-based NoC faulty core tolerance

A novel architecture is proposed to tolerate faulty cores in NoC-based MPSoCs. By dynamical reconfiguration of router/core connections, network can achieve complete restoration after faults and then former system states can resume without performance degradation. Moreover, a reconfiguration scheme is proposed to optimize system's recovery efficiency. By applying bipartite graphic model to formulate task migration overheads, a scheme inducing least recovery overheads can be quickly found. Experiments show that compared with common 2D mesh network, proposed architecture and reconfiguration scheme is capable of maintaining maximum originally active cores in the reconfigured network, incurring least task migration expenses. The efficiency of recovery process also improves due to over 90% reduction on the execution of the reconfiguration scheme.