Low-offset comparator using capacitive self-calibration

A new high-precision self-calibrated comparator for high resolution converters is presented. It uses a bridged-capacitor array as the calibration digital-to-analog converter (DAC) for high power efficiency and low noise. Post-layout simulations in a 1.8V 0.18μm CMOS show that the comparator achieves a less than 50μV offset for a 14-bit target resolution while consumes only 45μW at the frequency period of 300ns.