Co-integration of high-performance and high-breakdown SiGe HBTs in a BiCMOS technology

Having two, or more, transistors with different values of f
T
and BV
CEO
provides flexibility to circuit designers in making tradeoffs of power and performance. The process complexity and resulting cost of fabricating these transistors on the same wafer is another important factor. Three different approaches for co-integrating high-performance and high-breakdown SiGe npn HBTs with minimal process deviation are presented herein. The work features a high-performance HBT with f
T
× BV
CEO
product of 500GHz-V and a high-breakdown HBT with over 430GHz-V integrated on the same wafer with one-mask deviation.