Complementary RF-LDMOS transistors realized with standard CMOS implantations

Complementary lateral-drain-extended MOS transistors (CLDMOS) were integrated in a 0.13 μm SiGe BiCMOS technology. The LDMOS devices were realized in the dual-gate-oxide CMOS process without additional process steps. Drift regions were formed by the lightly-doped drain (LDD) implantations of 3.3V NMOS and PMOS transistors of the baseline process. The NLDMOS transistors use a combination of n-LDD and p-LDD to form the low-doped drift region whereas the PLDMOS drift region consists of the p-LDD implantation. Stable operation with less than 10% parameter variation in 10 years was achieved up to voltages of 6 V and 10 V for complementary LDMOS devices with different layouts. Peak transit frequencies f
_T
of 14.5 GHz and 9 GHz were demonstrated for PLDMOS transistors with V
_dd
,
_max
of -6 V and -10V, respectively.