A fast automatic frequency calibration scheme for PLL-based Frequency synthesizer

An automatic frequency calibration (AFC) for wide-band frequency synthesizers is presented in this paper. To achieve low phase noise, 6-bits switched-capacitors banks are employed in the VCO. The whole AFC is working under the control of reference clock to overcome the competition adventure that may caused by asynchronous sequential. One extra comparison is used to finally determine the optimum sub-band. Simulation result shows that the AFC ensures the synthesizer to lock at the linear range of the charge pump. The simulated AFC setting time is 19.2us in worst case. The AFC is implemented in 0.13μm CMOS technology.