Large-scale statistical performance modeling of analog and mixed-signal circuits

The aggressive scaling of IC technology results in large-scale performance variations that cannot be efficiently captured by traditional modeling techniques. This paper presents the recent development of statistical performance modeling and its important applications. In particular, we focus on two core techniques, sparse regression (SR) and Bayesian model fusion (BMF), that facilitate large-scale performance modeling with low computational cost. The basic ideas of SR and BMF are first explained and then their efficacy is compared to other traditional modeling approaches by using several analog and mixed-signal circuit examples.