Noise immunity enhancement for a distributed clock system in digital HF radar

This paper presents the experimental research on the influence of clock synchronisation in a multi-transceiver radar system in terms of phase noise and stability of the clock source. The work involves an implementation of a clock distribution method and discusses the experimental results. The TIGER-3 radar is being developed as an “all digital” radar with 20 integrated digital transceivers, each operating at 2.4kW of nominal power. Accurate coordination of all 20 transceivers is essential for generation of transmit signals, collection and merging of receive data to form a standard SuperDARN data set. Therefore, the system clock frequency must be highly stable and be tightly synchronised. In order to achieve this, a clock synchronisation method to coordinate the operation of entire system using a highly stable, accurate common clock source distributed to the transceivers is proposed. To improve noise immunity, differential signals are used. To further enhance the electromagnetic interference (EMI) immunity of the clock system, magnetic circuitry is employed. Moreover, the FPGA clocking features including Digital Clock Managers (DCMs) and Phase-Locked Loops (PLLs) available on the Xilinx Virtex-5 devices are used to correct and recover the received clock. Test results show that the clock system has excellent noise immunity allowing the radar system to perform at its full power.