Design validation on multiple-core CPU supported low power states using platform based infrared emission microscopy (PIREM) technique

An innovative post-silicon design validation methodology using recognized industry wide IREM imaging techniques in conjunction with full PC platform enablement was developed, and successfully applied to the IA-32 multiple-core (MC) Nehalem® microprocessor family [1]. Conventional structural based “tester” IREM characterization and debug techniques can, for the first time, be extended to the “platform” environment. IREM images can now be examined for design validations by running Windows/Linux® operating systems (OS) with market available benchmark software applications. This approach has been proven to be a faster, and significantly more cost effective, approach for post silicon design validation, power debug on low power Energy Star® states, and realistic customer applications.