Investigation of Abnormal $V_{\rm TH}/V_{\rm FB}$ Shifts Under Operating Conditions in Flash Memory Cells With $ \hbox{Al}_{2}\hbox{O}_{3}$ High-$\kappa$ Gate Stacks

Al
₂
O
₃
high-κ stack is a strong candidate as the dielectric layer in Flash memory cells for technology generations beyond sub-20 nm. In this paper, the cause of abnormal V
_TH
/V
_FB
shift at low operating electric fields is investigated, i.e., V
_TH
/V
_FB
reduces at low positive gate biases and increases at low negative gate biases. It is found that this instability does not originate from the electrons trapping/detrapping from the gate nor from the dielectric relaxation. For the first time, extensive experimental evidences show that this shift is caused by as-grown mobile charges in Al
₂
O
₃
layers generated by postdeposition annealing at 1000 °C or above. Its impacts on program/erase windows and read/pass disturbance in Flash memory cells are also evaluated.