Modeling lead free solder reliability in SSL applications towards virtual design

Life time predictions of microelectronics products are based on accelerated tests (ALT) [1]. The statistical distribution of failures, as typically shown in a Weibull plot, arise from the random variables such as material properties and geometric tolerances in manufacturing. These variations give rise to uncertainty in product life [2]. During the project, a 3D parametric model of the LED package has been generated including a preliminary study into the simplified geometric assumptions. This model incorporates non-linear temperature dependent behaviour for dielectric materials. It also describes both plastic strain and creep strain accumulation in the solder joint. Next, a DoE approach has been used in order to determine the influence of several factors on the creep strain accumulation during temperature loading. The factors which were evaluated were the thickness of the ceramic substrate, the presence of a (large) solder void, the stand- off, a small misalignment of the solder mask and the dielectric material (high and low Young's modulus). This investigation has shown a few unexpected results. The ceramic thickness and the solder mask alignment only have a relatively small influence on the creep strain accumulation. A thick ceramic substrate reduces the amount of creep strain accumulated and a misalignment of the solder mask also reduces the creep strain. The occurrence of a solder void increases the creep strain significantly. Also unexpected is the result that a high stand-off significantly increases the creep strain. This result is not yet understood. The dielectric material also has a large influence on the creep strain. Using the relatively softer type A material significantly reduces the creep strain compared to the type B material.