Semiconductor switches in counter-pulse capacitor bank

Operation of Counter-Pulse Capacitor Banks (CPCB) is characterized by a number of features, which complicate the safe operation of semiconductor switches. These features are as follows. The necessity to operate in the surge-current mode at high currents up to 100kA within about 1 ms results in overheating and possible thermal damage of the semiconductor structure. The discharge process ends with closing of the switches and emergence of reverse voltage, which can be higher than the initial voltage of the capacitors. One of the key elements of the discharge circuit is the inductor, which limits the discharge current. Reverse recovery process in the circuit with this inductor causes generation of high-voltage spikes, which might result in the damage of a semiconductor device overheated by surge-current by this moment. The paper studies the above-listed features and analyzes the safe operation of Pulsed Power Thyristors (PPT) and Light Triggered Thyristors (LTT) under these conditions. The method for tracking of thermal generation peaks on the thyristor voltage drop curve was used for evaluation of allowable currents. Suppression of switching overvoltages is commonly provided by snubber R-C circuits. To eliminate spikes a snubber R-C circuit should contain, as a rule, large capacitors and resistors with a low resistance. But, in this case the rate of anode current pulse rise is very high, which might cause the thyristor to fail during switch-on. This made it necessary to develop special snubber circuits, which are free from disadvantages of usual circuits. The paper presents the results of experimental research of the thyristor switch-on and switch-off in CPCB prototypes. The developed method (suppression of impulse switching overvoltages) is demonstrated. The possibility of safe operation of the semiconductor switches in CPCB has been verified.