A CMOS imaging system featuring focal-plane compression based on DPCM and VQ

We recently introduced a new focal plane image compression algorithm that is implemented with 607 transistors inside every 4 × 4 pixel block of a CMOS imager, using conventional 0.35 μm integration technology. This work focuses on preliminary results concerning the overall MTF of an imaging system in which the CMOS imager features focal-plane data compression based on DPCM and VQ with an overall bit rate below 0.94 bpp. Using bar-target pattern inputs, it is shown that details up to 2 cycles/cm are preserved in the decoded images.