An integrate-and-dump receiver for high dynamic range photonic analog-to-digital conversion

A high-linearity integrate-and-dump circuit is proposed for the electrical interface to a photonic sampling system. The integrate-and-dump receiver operates at 2 GS/s with a 500ps period for integration, hold, and reset. Better than 7.5 ENOB is measured with a sinewave input. The integrate-and-dump receiver is fabricated in a 120nm SiGe BiCMOS technology with a core current consumption of 84 mA from a 5 V supply.