Copper Anisotropy Effects in Three-Dimensional Integrated Circuits Using Through-Silicon Vias

The elastic anisotropy of copper through-silicon vias (TSVs) and its impact on performance and reliability in 3-D integrated structures is examined. Copper TSVs exhibit significant amount of elastic anisotropy, particularly for TSVs with very small diameters. The elastic anisotropy manifests itself in terms of different Young's moduli in different directions and results in orientation-dependent stress distributions. The copper anisotropy in TSVs is measured, and the impact on stress-induced mobility variation and structural reliability is examined using an advanced technology computer-aided design simulator. It is observed that both the charge carrier mobility and the structural reliability are affected by the anisotropy and its orientation. The copper anisotropy effects studied here become more prominent for TSVs with small diameters and/or large aspect ratios, and need to be assessed thoroughly in order to design robust 3-D structures.