A 0.06-mm2 double-sampling single-OTA 2nd-order ΔΣ modulator in 0.18-μm CMOS technology

A double-sampling single-OTA second-order ΔΣ modulator occupying a small silicon area of only 0.06 mm
²
is presented. The modulator employs a feedforward architecture incorporating a novel two-path summer and a compensator design in a double-sampling single-OTA switched-capacitor circuit. A new inherently linear mismatch-insensitive three-level DAC is implemented to further reduce the quantization noise. Operating with a 1-V supply, the second-order modulator achieves an effective sampling frequency of 1.024 MHz when clocked at 512 kHz due to its double-sampling operation while consuming a power of 17 μW. The dynamic range achieved is 67.6 dB over a signal bandwidth of 16 kHz at an oversampling ratio of 32.