An improved 512 bit EEPROM IP for RFID tag IC

A 512 bit EEPROM IP which is based on the SMIC 0.18 μm 2P6M embedded EEPROM process has been designed for RFID tag IC in this paper. The main improvement of the IP circuits includes timing control circuit of the digital circuit, charge pump and sense amplifier of the artificial circuit. A block erasing signal is added in the timing control circuit. Considering the request of low power consumption, the high voltage generator and the regulator of the charge pump are also improved. Current sensing scheme is employed in the design of sense amplifier (SA).