Fabrication of through-wafer interconnections by gold electroplating

A new method for conductive via's using gold electroplating is presented. Tapered walls through wafer via (TWV) holes were made using a variable isotropy DRIE process, with a very good control over the obtained angles - angles of 11.3° and 21.8° were obtained with errors smaller than 10%. Barrier and seed layers were deposited in via's performed by PVD (Physical Vapor Deposition) techniques with a very good coverage of the walls. Finally, gold electroplating was used to fill the narrow part of via's.