A design strategy for sub-threshold circuits considering energy-minimization and yield-maximization

This paper investigates a design strategy for sub-threshold circuits focusing on energy-consumption minimization and yield maximization under process variations. It is shown that 1) the minimum operation voltage (V
_DDmin
) of a circuit is dominated by FFs, and it can be improved by appropriate transistor sizing, 2) V
_DDmin
of a FF is stochastically modeled by a log-normal distribution, 3) V
_DDmin
of a large circuit can be estimated using the above model without extensive Monte-Carlo simulations, and 4) improving V
_DDmin
may substantially contribute to reduce energy consumption.