A 60 GHz CMOS Power Amplifier With Built-in Pre-Distortion Linearizer

A built-in pre-distortion linearizer using cold-mode MOSFET with forward body bias is presented for 60 GHz CMOS PA linearization on 90 nm CMOS LP process. The power amplifier (PA) achieves a P
_sat
of 10.72 dBm and OP
₁
dB of 7.3 dBm from 1.2 V supply. After linearization, the OP
₁
dB has been doubled from 7.3 to 10.2 dBm and the operating PAE at OP
₁
dB consequently improves from 5.4% to 10.8%. The optimum improvement of the IMD3 is 25 dB.