A CMOS data and clock recovery macrocell for burst-mode/continuous-mode transmissions

A data and clock recovery circuit, where a VCO is controlled by seven phase control signals, is implemented as a macrocell in 0.5 /spl mu/m CMOS. The 1.5/spl times/2.1 mm/sup 2/ macrocell can capture a burst-signal within three bits, can tolerate more than 500 bit runlength, can track phase-variation up to 2 /spl pi//spl times/690/spl times/10/sup 3/ rad/s, and dissipates 235 mW from a 3.3 V supply at 155.52 Mb/s. The macrocell can operate up to 320 Mb/s.