A novel ADL-based compiler-centric software framework for reconfigurable mixed-ISA processors

Reconfigurable processor architectures can dynamically switch their instruction set and instruction format at run time. They offer a new flexibility for adapting to changing applications' requirements in order to optimize performance and enable resource-awareness. While programmability is a key issue of such architectures, today's software toolchains are limited to static ISA architectures and must be extended to support reconfigurable processors that can expose different ISAs at run time. In this paper, we address this shortcoming by presenting a novel retargetable software toolchain that is suitable for mixed-ISA application development as well as design space exploration (DSE). Therefore, we developed a novel mixed-ISA, compiler- and simulator-centric, behavioral architecture description language (ADL). The ADL provides the necessary flexibility to describe multiple ISAs for the software framework. The individual framework tools - the compiler, binary utilities, and instruction set simulator (ISS) - are generated from an ADL description. To realize the complex compiler inside the framework, we extended the LLVM compiler infrastructure by a mixed-ISA retargetable code generator (compiler back-end). To illustrate the flexibility of the ADL-based software toolchain, we performed a first DSE for application characterization of a variety of multi-domain applications. To show the feasible performance/resource benefits through dynamic reconfiguration, we further developed a mixed-ISA application that can dynamically change its instruction format at run time.