Single-event transient mitigation in sub-micron combinational circuits

In this paper we use a pair of cross-coupled inverters as a weak-latch to mitigate Single Event Transient (SET) effects in combinational logic for sub-micron technologies. A weak-latch is added to a sequential element input to slow down the data transitions and as a result filters out SET pulses that are faster than its delay. By applying this method we succeed to completely filter out transient pulse widths of up to 350 ps and to decrease SET pulse widths of up to 500 ps by more than 50%. SET pulse width measurements from 2-D TCAD simulations show that for 65-nm technology SET pulses induced by heavy ion particles with energies up to 14 MeV.cm
²
/mg can be completely filtered while SET pulses produced by particles with energies up to 20 MeV.cm
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/mg are narrowed down by more than half of their original pulse width by using this weak-latch.