Design of cross coupled CMOS unsaturated ring oscillators

Design is presented for lowering phase noise in CMOS unsaturated ring oscillator having cross coupled pair load. It is verified on simulated circuit examples using 0.18μm CMOS technology. The procedure involves methodically varying circuit parameters such as W/L ratios and biasing to reduce phase noise from cycle to cycle correlation, while keeping a constant oscillation frequency and power dissipation.