Faults test generation algorithm based on threshold for digital circuit

An effective test generation algorithm based on threshold for digital circuits is proposed in this paper. Firstly, threshold test generation model for digital circuit is constructed, acceptable faults can be distinguished from unacceptable faults by using the model. Then threshold test patterns can be generated for unacceptable faults by using mature stuck-at faults test generation algorithm. The experimental results on ISCAS'85 and ISCAS'89 circuits demonstrate the algorithm had high faults coverage and short test generation time.