A reconfigurable multirate single-bit sigma delta modulator for multi-standard wireless radio receivers

A novel low-power 2-1-1 cascade sigma delta (SD) modulator with single-bit quantizers for multi-standard wireless radio receivers is proposed in the paper. In order to reduce the power dissipation, the multirate technique is introduced. The multirate modulator decreases the sampling frequency of the 1
^st
stage integrators which primarily determine the power consumption of the total modulator. The resolution is compensated by improving the sampling frequency of the latter integrators. A feedforward path is added to suppress the harmonic distortion and attain high linearity over a wide bandwidth. The circuit nonidealities are analyzed, and the feasibility and efficiency of the modulator are demonstrated in time domain using Matlab/Simulink. A peak signal to noise ratio (SNR) of 85/ 81/ 65/ 63/ 55/ 45 dB is achieved over a 0.2/ 1/ 2/ 3.84/ 22/ 28 MHz channel bandwidth for GSM/ Bluetooth/ GPS/ WCDMA/ WLAN/ WiMAX mode. The simulation results indicate that the proposed modulator architecture meets the performance requirements of the communication standards mentioned above.