Design and simulation of CMOS LNA for down converting sigma-detla ADC for reconfigurable RF receiver

In this paper, we propose simulation results of a wideband Low noise amplifier(LNA) for down converting sigma-delta A/D converter for reconfigurable RF receiver architecture. The proposed LNA is designed for frequency range of 1.7GHz to 10GHz providing a gain of 7.5-9.766 dB, noise figure of 1.454-5.166dB, input matching of -5.77 to -23.8 dB, IIP3 and P1dB of 6.7dBm and 17.2dBm and stability over the entire frequency spectrum. The power dissipation is 7.404mW from 1.5V supply. The simulations are performed on Cadence RF specter.