Low temperature polycrystalline Si nanowire devices with gate-all-around Al2O3/TiN structure using an implant-free technique

In this work, for the first time, we propose and demonstrate an implant-free gate-all-around (GAA) low-temperature poly-Si (LTPS) nanowire (NW) device with Al
₂
O
₃
dielectric and TiN gate. Since the channel and source/drain (S/D) regions are sharing one in-situ phosphorous-doped poly-Si material, the process cost could be efficiently reduced. Such novel scheme appears to be promising for both system-on-panel (SOP) and three dimensional IC applications. High on-off current ratio and on-state performance are demonstrated for the new device.