Towards 1X DRAM: Improved leakage 0.4 nm EOT STO-based MIMcap and explanation of leakage reduction mechanism showing further potential

We establish a new record low leakage (J
_G
)-EOT for DRAM compatible MIMcap by further J
_G
reduction to 2×10
^-8
(10
^-7
) A/cm
²
at 0.45 (0.40) nm EOT (0.8 V) using an improved RuO
_x
/TiO
_x
/Sr-rich Sr
_x
Ti
_y
O
_z
(STO) stack. Further, for the first time we provide insight explaining the origin of the record low J
_G
-EOT achieved, by detailed studies of our TiO
_x
/STO stack on TiN, Ru and RuO
_x
bottom electrodes (BE). TiO
_x
reduces EOT on all BE (without degrading microstructure), but RuO
_x
is needed for low J
_G
. We prove the latter is NOT due to a work function (WF) effect, measuring -on the contrary- strong Fermi Level Pinning (FLP) at STO midgap and same e-injection barrier (~1.6 eV) from TiN, Ru or RuO
_x
. We determine leakage is controlled by similar traps (~0.8 eV below CBE) in STO for all stacks and BE, and attribute improvement with RuO
_x
to local STO trap density reduction by eliminating (or even reversing) oxygen scavenging effects near the electrode during crystallization. We demonstrate the potential for further J
_G
reduction by lowering trap density, with theoretical limit for trap-free STO of 10
^-15
A/cm
²
at EOT~0.4 nm. These results make STO a clear candidate for future DRAM.