Lanthanum-Oxide-Doped Nitride Charge-Trap Layer for a TANOS Memory Device

A charge-trap-type Flash memory with a
$\hbox{La}_{2}\hbox{O}_{3}$
-doped
$\hbox{Si}_{3}\hbox{N}_{4}$
charge-trapping layer is demonstrated for the first time. An ultrathin
$\hbox{La}_{2} \hbox{O}_{3}$
layer is inserted in the middle of a
$\hbox{Si}_{3} \hbox{N}_{4}$
layer, followed by high-temperature annealing to mix the two layers. The
$\hbox{La}_{2}\hbox{O}_{3}$
-doped
$\hbox{Si}_{3}\hbox{N}_{4}$
layer, irrespective of
$ \hbox{Si}_{3}\hbox{N}_{4}$
deposition processes, is found to provide deep charge-trapping sites, resulting in an excellent pre-/postcycling retention property and high reliability. The optimization of the
$\hbox{La}_{2}\hbox{O}_{3}$
layer thickness and position in the
$\hbox{Si}_{3}\hbox{N}_{4}$
trapping layer has been also systematically studied.