Logic Style Comparison Using 32-Bit CLA in 90Nm Technology

Recently reported logic style comparisons are base don gate level analysis. If not, the comparison is based on the systems' best-case analysis. This work compares logic families by implementing a 32-bit carry look-ahead adder in 90nmtechnology. It focuses on comparing full-rail logic styles such as static CMOS, DCVSL, and DVL because as the transistor lengths get shorter, as is the current trend, the supply also decreases that it may not make other logic style families to work. Results show that for low power application, it is best to use CMOS logic style because of its low average power consumption.