A Switching Sequence for Linear Gradient Error Compensation in the DAC Design

A switching sequence is proposed to compensate for the linear gradient error in the current source array of current-steering digital-to-analog converter (DAC). A systematic method is established to obtain a switching sequence for both 1-D and 2-D current source arrays. The proposed switching sequence is also validated by the mathematical induction and exhibits a minimum variance of error. The proposed switching sequence is implemented into a 10-bit DAC. Simulation results show that the proposed switching sequence performs with a better integral nonlinearity (INL) and differential nonlinearity (DNL) compared to those of other switching sequences. The DAC is fabricated in a 1P6M 0.18-μm 1.8-V CMOS process and consumes less than 25 mW of power. The measured INL and DNL of the fabricated 10-b DAC are less than 0.62 and 0.41 LSB, respectively.