Fault Masking and Diagnosis in Reversible Circuits

Reversible logic is a promising design methodology, particularly in the scope of quantum computing, for extremely low power consumption by elimination of power dissipation due to information loss. Anticipated high fault rates for future technologies raise demand for fault tolerance in reversible logic. In this paper we propose fault masking techniques (to prevent error propagation) for reversible logic. We present different implementations of reversible majority voters. Using voter insertion techniques and taking advantage of available non-functional outputs, we are able to provide diagnosis information with adjustable resolution for reversible circuits. Such diagnosability has important applications in manufacturing testing as well as online repair. In contrast to previous work this voter is robust against single point of failure. We target missing and repeated gate fault models which are specific to reversible logic.