An ISM 2.4 GHz low-IF receiver frontend

This paper describes the implementation of an RF receiver frontend for the 2.4 GHz ISM band; it comprises an LNA, an IQ oscillator/mixer, and a low-pass filter. The proposed circuit is low cost and power efficient. To be low cost the circuit is inductorless and implemented in a standard nanoscale digital CMOS technology, with a state-of-the-art figure for area. To be power efficient all the circuits were chosen based on their power efficiency. A contribution in this paper is a new, more efficient, IQ oscillator/mixer block, where the current is reduced by 25% and reused for the two functions. A prototype of a low-IF receiver frontend is designed in UMC 130nm CMOS technology and simulated with a post-layout including pads netlist, and off chip elements as bonding wires and load models. The frontend active area is 0.051 mm
²
(die area with pads is 0.395 mm
²
), and the power consumption is 16.3 mW from a 1.2 V supply for a frontend gain of 27 dB.