A 1.8V/5.2GHz WLAN CMOS RFIC receiver

This paper describes a low-cost 1.8V/5.2GHz monolithic Zero-IF receiver. All of the RF and conversion receiver components, with the exception of the frequency synthesizer, have been integrated into a single chip solution. The circuit is implemented in a 0.18μm CMOS technology and is suitable for WLAN applications. Is optimized to noise performance, gain and differential mismatches. At 5.2GHz the system simulations shows NF=3.7dB, 1dB
_CP
= -22dBm and IIP3 = -10dBm. In a 200MHz span around 5.2GHz the power gain is higher then 25dB and the phase and gain mismatches lower than 7° and 0.1dB, while drawing 20mA from a 1.8V power supply.