Failure mechanism of 20 μm pitch microjoint within a chip stacking architecture

In order to investigate the failure mechanism of microjoints within a chip stacking architecture, four chips with more than 3000 microbumps each were assembled on a Si interposer by Toray's FC-3000WS bonder at a peak temperature of 280°C without any flux. The defects such as missing bumps and deformation of microjoints induced by the undercut of Cu pillar have been improved based on a new design rule of seed layer. Then two different underfill materials were used to seal the microgaps between the chips and the interposer, respectively. They were post-cured at 150°C for 30 minutes and 165°C for 120 minutes. The inspection results of scanning acoustic microscope (SAM) showed that no gas voids were formed within the underfill material having a lower viscosity of 9 Pas and a smaller averaged filler size of 0.3 um, even though the gap width is less than 20 μm. In the previous works [7, 8], the authors pointed out that the 30 μm pitch microjoints are easily failed under temperature cycling test (TCT), therefore, the same test condition (JESD22-A104-B, Condition B, Soak mode 2) were adopted again to assess the reliability of the 20 um pitch microjoints sealed by different underfill materials. From the test results, the various underfill materials gave different failure rates but had the same failure mode under TCT, and the microjoints sealed by the previously mentioned underfill had a longer lifespan. The cross-sectional images of scanning electronic microscope (SEM) indicated that the failure was induced by the interfacial fracture of the microjoints. The elemental distributions of Sn and Ni were identified by mapping analyses using energy dispersive spectrometer (EDS), in which the intermetallic phase of Ni
₃
Sn
₄
at the chip-side and the interposer-side could not cohere during their growth as heated. This is because a Sn depletion zone caused by the unbalanced growth kinetics of the Ni
₃
Sn
₄
at both interfaces was formed in the microbumps at the chip-side as aged, and which perhaps made the Ni
₃
Sn
₄
have too much defects and could not link up with the Ni
₃
Sn
₄
at the interposer-side by solid-solid interdiffusion. Finally, the tensile stress came from the thermal expansion of underfill resulted in the fracture of the 20 μm pitch microjoints along the interface between the Ni layer and the Sn2.5Ag solder alloy of the top chip.