A novel PMOS SOI polysilicon transistor

An advanced silicon-on-insulator (SOI) PMOS polysilicon transistor, featuring an inverted gate electrode and self-aligned source/drain and gate/channel regions, is developed and characterized. Selective oxidation is used to form self-aligned thin polysilicon channel regions with thicker source/drain polysilicon regions. The gate electrode is formed by a high-energy boron implant into the underlying silicon substrate. Since the gate oxide is formed over single-crystal silicon rather than polysilicon, an improvement in gate oxide integrity is possible. The resulting SOI PMOS device is suitable for high-density static random access memory (SRAM) circuit applications and exhibits excellent short-channel behavior with an on/off current ratio exceeding six orders of magnitude.<
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