Negative substrate bias effects on collector resistance in SiGe HBTs on thin film SOI

An analytical expression for collector resistance of a novel vertical SiGe partially-depleted HBT on thin SOI is obtained under negative substrate biases. The resistance decreases slowly with the increase of substrate-collector bias and the influence on transit frequency is trivial and acceptable. The model is consistent with simulation result and found to be significant in the design and simulation of 0.13 µm millimeter wave SiGe SOI BiCMOS technology.