Fixed-point co-design in DSP

Fixed-point implementation of DSP algorithms is attractive from the viewpoints of simplicity, cost-effectiveness and performance. Two problems confront the designer-(i) Lack of efficient compilers from high level languages to assembler for fixed-point DSPs, and (ii) Limited capabilities for automated systems design, rapid simulation, verification, and prototyping of fixed-point algorithms. This paper discusses recent efforts at the DSP Laboratory at Georgia Tech that address these problems within the VHDL library-based QuickFix environment.