Design and Implementation of 20GHz Ultra High-Speed Time-to-Digital Converter

This article introduced a design principle and implementation method of ultra high-speed Time-to-Digital Converter(TDC). It described the system's composition in hardware and software view. The system is composed of serial-parallel converter MAX3953, high-speed clock generator AD9518, Spartan-6 series FPGA XC6LX100T and high-speed DDR3-SDRAM. Software includes FPGA program and user application software. Modularized design methods are used in software development, convenient for user's customization. It achieved 50ps time resolution and has been tested in latest TOFMS system.