Frequency down-conversion with complementary-MOS inverters

This paper focuses on the frequency-down-conversion realized with a proposed Mixer topology using 4 CMOS inverters only. From simulation and using typical 0.35μm CMOS process parameters, the proposed Mixer exhibits at 900MHz under 2.5 supply voltage, the following performances: a 16.8dB conversion gain, a 23dBc-IM3 with 200mVpeak-to-peak input sinusoidal waves. The corresponding IIP3 is 10dBm for a total power consumption of 1.4mW.