Low Power Dual Core Microcontroller

Micro controllers that can provide higher performance while maintaining low power consumption is a key research area. Power aware high performance micro controllers are critical in embedded system applications. This paper mainly focuses on the Low Power implementation of a Dual Core Micro controller using 130 μm CMOS Technology. Peripherals are efficiently shared by the two cores thus reducing the area and power. A Dual Core Micro controller is better than a Multiple Micro controller system in terms of power consumption and silicon area used. Architectural level power reduction can be achieved by adopting pipelining and efficient instruction set. Circuit level power reduction can be achieved by sleep mode when the core is inactive, reducing redundant operations in ALU, State Machine Encoding, Clock Gating etc. The modules were designed using Verilog TM HDL and simulated in Model Sim 6.2c. The synthesis of the design was done using Synopsys Design Compiler .The Power, Area and Performance analysis of the design was performed thereafter.