Implementation of FIR filter on FPGA using DAOBC algorithm

This paper present circuit architecture for 16-order FIR filter on FPGA. First, It introduce the principle of Distributed Arithmetic (DA) and DA-Offset Binary Coding (DA-OBC). Second, The circuit design of FIR low-pass filter base on DA-OBC algorithm is proposed and synthesized under the integrated environment of maxplus 2. The simulation results shows that the implementation works well and meets requirements.