A novel 800V multiple RESURF LDMOS utilizing linear p-top rings

In this paper, a novel 800V multiple RESURF lateral double-diffused MOS (LDMOS) transistor in junction-isolated power IC technology is developed and successfully simulated. The proposed multiple RESURF LDMOS is able to achieve a specific on-resistance of lower than 130 mΩcm
²
while maintaining a breakdown voltage of over 800 volts. The key feature of this novel device is round shape p-top rings which are located on the surface of n-drift region. Optimization of p-top mask design is performed in order to achieve the lowest on-resistance possible with the desired breakdown voltage. An investigation of 3D effect in cylindrical layout is also presented to confirm the performance of device.