VLIW processor for H.264: Integer transform and Quantization

As the performance of mobile devices increases, a demand for watching high quality videos in those devices also increases. VLIW (Very Long Instruction Word) processors have been used as a coprocessor to accelerate the performance of various CODECs in the embedded systems, e.g. TI Davinci, but the general VLIW has too much redundancies if the applications required to be executed on the VLIW are restricted. In this paper, we propose a VLIW processor focused on the DCT and Quantization of H.264. Our proposed architecture has 4 issue slots and 16 bit width data path which is half of the TI's TMS320C6× series, but performs better than the TMS320C6× series in terms of cycle count and throughput.