Fully Differential Current-Mode CMOS Triode Translinear Multiplier

A novel fully differential current-mode multiplier based on a translinear (TL) loop is presented. The transistors that form the TL loop are working in the triode region, and a novel biasing scheme is used, allowing operation in two quadrants. The biasing circuitry is designed using simple current conveyors and a common-mode control circuit. Measurement results for a chip fabricated in a 0.5-
$\mu\hbox{m}$
CMOS technology are shown to demonstrate the feasibility of the technique. Furthermore, an analysis of second-order effects is also reported.