A compact automatic gain control loop for GNSS RF receiver

A compact automatic gain control (AGC) loop for GNSS RF receiver is presented in this paper. The proposed AGC loop circuit achieves higher integration and lower power by eliminating the bulky off-chip capacitor and charge pump circuit, which are widely used in traditional AGC. The proposed AGC consists of a programmable gain amplifier (PGA), a 2-bit flash analog to digital converter (ADC), and a novel AGC unit. The proposed AGC loop circuit is implemented in a 0.18μm CMOS process, and occupies a die area of 0.275mm
²
. Simulation results show that the proposed AGC loop has a 29.5dB control range and a settling time of less than 0.25ms.