A device-physics-basic SPICE model for PDSOI CMOS SEU

An ion vertical striking on SOI CMOS transistor sensitive region creates an obvious large current resulting in upset of output node. Since parasitic BJT act, the single-event effect (SEE) is enhanced. In order to evaluate this effects, it is desirable to calculate critical charge (Q
_crit
, charge collected by the drain during the entire SEE) and the duration of output voltage pulse. With ISE TCAD, two-dimensional simulation is used to determine these parameters, assist to examine and analyze electrical behavior. According to the physical mechanism, a device-basic SPICE model is proposed as an engineering approach to predict the single-event upsets (SEU) of integrated circuit. This paper describes explicitly on the parameter extraction and calculation, and shows reasonable agreement with 2-D simulated results.