Fast implementation of the phase shift beamformer

This paper describes a combined standard-cell/FPGA implementation of a phase shift beamformer. To obtain high-resolution real-time images a word-parallel pipelined CORDIC processor is used to compute the large number of complex multiplications needed. Analogue preprocessing amplifies, demodulates and samples the outputs from a 16 sensor linear ultrasonic array. The current system is configured to form 2-D images, however using additional CORDIC processors a 3-D beamformer can be realised.